The huge area overhead of the interconnect is one of the serious issues in static random access memory (SRAM)-based field-programmable gate arrays (FPGAs), resulting in high power consumption and slow operating speed. Another major issue is the volatile feature of the SRAM, which results in high standby leakage current and long power-ON time. Resistive random access memory (RRAM) which has a high resistance ratio and zero standby power holds great potential in the FPGA application. The conventional RRAM-based nonvolatile FPGAs (NVFPGAs) can use one-transistor 2-RRAM (1T2R) storage element to replace the SRAM or the one RRAM (1R) cell to swap both the nMOS switch and SRAM. However, those NVFPGA schemes may suffer from the problems of low reliability, high configuration power, and high active leakage power. In this paper, we recommend a novel element [one-diode two RRAM (1D2R) cells] to swap the nMOS switch and 6 Transistors (6T) SRAM. In the meantime, the novel block structures of the logic block, connection block, switch block, and the FPGA architecture based on the 1D2R element are recommended. Compared with the conventional 1T2R-based NVFPGA, our novel structure could improve the operational speed by 53% with a 40.5% lower operating power. Compared with the conventional 1R-based NVFPGA, the recommended scheme could greatly reduce the write error rate by eight orders with greater than 20 times minimum write power.